AMD shared the 3D Chiplet technology with the audience using TMSC’s 3D Fabric infrastructure at today’s event. AMD researched new technologies for a period of time and announced the first phase of 3D Chiplet technology at its event.
AMD has successfully achieved high bandwidth by combining the 3D Fabric technology developed by TMSC with its cache. AMD announced in March 2020 that it was developing 3D stack technology together with X3D and announced that it could achieve 10 times the bandwidth due to the new technology.
AMD CEO Lisa Su showed off one of the Zen 3-core Ryzen 5000 processors. Lisa announced that each chip has a 96 MB cache to achieve high performance.
According to AMD, due to the new technology, Ryzen 5000 can now provide 2TB/s bandwidth and 96MB L3 cache instead of 32MB L3.
The company shared the test results with Gears of War 5. To compare prototypes using the new 3D V-Cache technology based on the standard Ryzen 9 5900X and Ryzen 9 5900X, the company fixed both processors at 4 GHz and used unnamed graphics cards.
AMD said the test results have increased by 12% and announced that players could achieve an average 15% performance improvement through 3D V-Cache.
